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PassiveRateGroupComponentAc.cpp
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1 // ======================================================================
2 // \title PassiveRateGroupComponentAc.cpp
3 // \author Generated by fpp-to-cpp
4 // \brief cpp file for PassiveRateGroup component base class
5 // ======================================================================
6 
8 #include "Fw/Types/Assert.hpp"
10 #if FW_ENABLE_TEXT_LOGGING
11 #include "Fw/Types/String.hpp"
12 #endif
13 
14 namespace Svc {
15 
16  // ----------------------------------------------------------------------
17  // Component initialization
18  // ----------------------------------------------------------------------
19 
21  init(FwEnumStoreType instance)
22  {
23  // Initialize base class
25 
26  // Connect input port CycleIn
27  for (
28  FwIndexType port = 0;
29  port < static_cast<FwIndexType>(this->getNum_CycleIn_InputPorts());
30  port++
31  ) {
32  this->m_CycleIn_InputPort[port].init();
33  this->m_CycleIn_InputPort[port].addCallComp(
34  this,
35  m_p_CycleIn_in
36  );
37  this->m_CycleIn_InputPort[port].setPortNum(port);
38 
39 #if FW_OBJECT_NAMES == 1
40  Fw::ObjectName portName;
41  portName.format(
42  "%s_CycleIn_InputPort[%" PRI_PlatformIntType "]",
43  this->m_objName.toChar(),
44  port
45  );
46  this->m_CycleIn_InputPort[port].setObjName(portName.toChar());
47 #endif
48  }
49 
50  // Connect output port Time
51  for (
52  FwIndexType port = 0;
53  port < static_cast<FwIndexType>(this->getNum_Time_OutputPorts());
54  port++
55  ) {
56  this->m_Time_OutputPort[port].init();
57 
58 #if FW_OBJECT_NAMES == 1
59  Fw::ObjectName portName;
60  portName.format(
61  "%s_Time_OutputPort[%" PRI_PlatformIntType "]",
62  this->m_objName.toChar(),
63  port
64  );
65  this->m_Time_OutputPort[port].setObjName(portName.toChar());
66 #endif
67  }
68 
69  // Connect output port Tlm
70  for (
71  FwIndexType port = 0;
72  port < static_cast<FwIndexType>(this->getNum_Tlm_OutputPorts());
73  port++
74  ) {
75  this->m_Tlm_OutputPort[port].init();
76 
77 #if FW_OBJECT_NAMES == 1
78  Fw::ObjectName portName;
79  portName.format(
80  "%s_Tlm_OutputPort[%" PRI_PlatformIntType "]",
81  this->m_objName.toChar(),
82  port
83  );
84  this->m_Tlm_OutputPort[port].setObjName(portName.toChar());
85 #endif
86  }
87 
88  // Connect output port RateGroupMemberOut
89  for (
90  FwIndexType port = 0;
91  port < static_cast<FwIndexType>(this->getNum_RateGroupMemberOut_OutputPorts());
92  port++
93  ) {
94  this->m_RateGroupMemberOut_OutputPort[port].init();
95 
96 #if FW_OBJECT_NAMES == 1
97  Fw::ObjectName portName;
98  portName.format(
99  "%s_RateGroupMemberOut_OutputPort[%" PRI_PlatformIntType "]",
100  this->m_objName.toChar(),
101  port
102  );
103  this->m_RateGroupMemberOut_OutputPort[port].setObjName(portName.toChar());
104 #endif
105  }
106  }
107 
108  // ----------------------------------------------------------------------
109  // Getters for typed input ports
110  // ----------------------------------------------------------------------
111 
114  {
115  FW_ASSERT(
116  portNum < this->getNum_CycleIn_InputPorts(),
117  static_cast<FwAssertArgType>(portNum)
118  );
119 
120  return &this->m_CycleIn_InputPort[portNum];
121  }
122 
123  // ----------------------------------------------------------------------
124  // Connect input ports to special output ports
125  // ----------------------------------------------------------------------
126 
129  FwIndexType portNum,
130  Fw::InputTimePort* port
131  )
132  {
133  FW_ASSERT(
134  portNum < this->getNum_Time_OutputPorts(),
135  static_cast<FwAssertArgType>(portNum)
136  );
137 
138  this->m_Time_OutputPort[portNum].addCallPort(port);
139  }
140 
143  FwIndexType portNum,
144  Fw::InputTlmPort* port
145  )
146  {
147  FW_ASSERT(
148  portNum < this->getNum_Tlm_OutputPorts(),
149  static_cast<FwAssertArgType>(portNum)
150  );
151 
152  this->m_Tlm_OutputPort[portNum].addCallPort(port);
153  }
154 
155  // ----------------------------------------------------------------------
156  // Connect typed input ports to typed output ports
157  // ----------------------------------------------------------------------
158 
161  FwIndexType portNum,
162  Svc::InputSchedPort* port
163  )
164  {
165  FW_ASSERT(
166  portNum < this->getNum_RateGroupMemberOut_OutputPorts(),
167  static_cast<FwAssertArgType>(portNum)
168  );
169 
170  this->m_RateGroupMemberOut_OutputPort[portNum].addCallPort(port);
171  }
172 
173 #if FW_PORT_SERIALIZATION
174 
175  // ----------------------------------------------------------------------
176  // Connect serial input ports to special output ports
177  // ----------------------------------------------------------------------
178 
181  FwIndexType portNum,
182  Fw::InputSerializePort* port
183  )
184  {
185  FW_ASSERT(
186  portNum < this->getNum_Time_OutputPorts(),
187  static_cast<FwAssertArgType>(portNum)
188  );
189 
190  this->m_Time_OutputPort[portNum].registerSerialPort(port);
191  }
192 
195  FwIndexType portNum,
196  Fw::InputSerializePort* port
197  )
198  {
199  FW_ASSERT(
200  portNum < this->getNum_Tlm_OutputPorts(),
201  static_cast<FwAssertArgType>(portNum)
202  );
203 
204  this->m_Tlm_OutputPort[portNum].registerSerialPort(port);
205  }
206 
207 #endif
208 
209 #if FW_PORT_SERIALIZATION
210 
211  // ----------------------------------------------------------------------
212  // Connect serial input ports to typed output ports
213  // ----------------------------------------------------------------------
214 
217  FwIndexType portNum,
218  Fw::InputSerializePort* port
219  )
220  {
221  FW_ASSERT(
222  portNum < this->getNum_RateGroupMemberOut_OutputPorts(),
223  static_cast<FwAssertArgType>(portNum)
224  );
225 
226  this->m_RateGroupMemberOut_OutputPort[portNum].registerSerialPort(port);
227  }
228 
229 #endif
230 
231  // ----------------------------------------------------------------------
232  // Component construction and destruction
233  // ----------------------------------------------------------------------
234 
236  PassiveRateGroupComponentBase(const char* compName) :
237  Fw::PassiveComponentBase(compName)
238  {
239  // Write telemetry channel MaxCycleTime
240  this->m_first_update_MaxCycleTime = true;
241  this->m_last_MaxCycleTime = 0;
242  }
243 
246  {
247 
248  }
249 
250  // ----------------------------------------------------------------------
251  // Getters for numbers of typed input ports
252  // ----------------------------------------------------------------------
253 
256  {
257  return static_cast<FwIndexType>(FW_NUM_ARRAY_ELEMENTS(this->m_CycleIn_InputPort));
258  }
259 
260  // ----------------------------------------------------------------------
261  // Getters for numbers of special output ports
262  // ----------------------------------------------------------------------
263 
266  {
267  return static_cast<FwIndexType>(FW_NUM_ARRAY_ELEMENTS(this->m_Time_OutputPort));
268  }
269 
272  {
273  return static_cast<FwIndexType>(FW_NUM_ARRAY_ELEMENTS(this->m_Tlm_OutputPort));
274  }
275 
276  // ----------------------------------------------------------------------
277  // Getters for numbers of typed output ports
278  // ----------------------------------------------------------------------
279 
282  {
283  return static_cast<FwIndexType>(FW_NUM_ARRAY_ELEMENTS(this->m_RateGroupMemberOut_OutputPort));
284  }
285 
286  // ----------------------------------------------------------------------
287  // Connection status queries for special output ports
288  // ----------------------------------------------------------------------
289 
292  {
293  FW_ASSERT(
294  portNum < this->getNum_Time_OutputPorts(),
295  static_cast<FwAssertArgType>(portNum)
296  );
297 
298  return this->m_Time_OutputPort[portNum].isConnected();
299  }
300 
303  {
304  FW_ASSERT(
305  portNum < this->getNum_Tlm_OutputPorts(),
306  static_cast<FwAssertArgType>(portNum)
307  );
308 
309  return this->m_Tlm_OutputPort[portNum].isConnected();
310  }
311 
312  // ----------------------------------------------------------------------
313  // Connection status queries for typed output ports
314  // ----------------------------------------------------------------------
315 
318  {
319  FW_ASSERT(
320  portNum < this->getNum_RateGroupMemberOut_OutputPorts(),
321  static_cast<FwAssertArgType>(portNum)
322  );
323 
324  return this->m_RateGroupMemberOut_OutputPort[portNum].isConnected();
325  }
326 
327  // ----------------------------------------------------------------------
328  // Port handler base-class functions for typed input ports
329  //
330  // Call these functions directly to bypass the corresponding ports
331  // ----------------------------------------------------------------------
332 
335  FwIndexType portNum,
336  Os::RawTime& cycleStart
337  )
338  {
339  // Make sure port number is valid
340  FW_ASSERT(
341  portNum < this->getNum_CycleIn_InputPorts(),
342  static_cast<FwAssertArgType>(portNum)
343  );
344 
345  // Call handler function
346  this->CycleIn_handler(
347  portNum,
348  cycleStart
349  );
350  }
351 
352  // ----------------------------------------------------------------------
353  // Invocation functions for typed output ports
354  // ----------------------------------------------------------------------
355 
358  FwIndexType portNum,
359  U32 context
360  )
361  {
362  FW_ASSERT(
363  portNum < this->getNum_RateGroupMemberOut_OutputPorts(),
364  static_cast<FwAssertArgType>(portNum)
365  );
366  this->m_RateGroupMemberOut_OutputPort[portNum].invoke(
367  context
368  );
369  }
370 
371  // ----------------------------------------------------------------------
372  // Telemetry write functions
373  // ----------------------------------------------------------------------
374 
377  U32 arg,
378  Fw::Time _tlmTime
379  )
380  {
381  // Check to see if it is the first time
382  if (not this->m_first_update_MaxCycleTime) {
383  // Check to see if value has changed. If not, don't write it.
384  if (arg == this->m_last_MaxCycleTime) {
385  return;
386  }
387  else {
388  this->m_last_MaxCycleTime = arg;
389  }
390  }
391  else {
392  this->m_first_update_MaxCycleTime = false;
393  this->m_last_MaxCycleTime = arg;
394  }
395 
396  if (this->m_Tlm_OutputPort[0].isConnected()) {
397  if (
398  this->m_Time_OutputPort[0].isConnected() &&
399  (_tlmTime == Fw::ZERO_TIME)
400  ) {
401  this->m_Time_OutputPort[0].invoke(_tlmTime);
402  }
403 
404  Fw::TlmBuffer _tlmBuff;
405  Fw::SerializeStatus _stat = _tlmBuff.serialize(arg);
406  FW_ASSERT(
407  _stat == Fw::FW_SERIALIZE_OK,
408  static_cast<FwAssertArgType>(_stat)
409  );
410 
411  FwChanIdType _id;
412 
413  _id = this->getIdBase() + CHANNELID_MAXCYCLETIME;
414 
415  this->m_Tlm_OutputPort[0].invoke(
416  _id,
417  _tlmTime,
418  _tlmBuff
419  );
420  }
421  }
422 
425  U32 arg,
426  Fw::Time _tlmTime
427  )
428  {
429  if (this->m_Tlm_OutputPort[0].isConnected()) {
430  if (
431  this->m_Time_OutputPort[0].isConnected() &&
432  (_tlmTime == Fw::ZERO_TIME)
433  ) {
434  this->m_Time_OutputPort[0].invoke(_tlmTime);
435  }
436 
437  Fw::TlmBuffer _tlmBuff;
438  Fw::SerializeStatus _stat = _tlmBuff.serialize(arg);
439  FW_ASSERT(
440  _stat == Fw::FW_SERIALIZE_OK,
441  static_cast<FwAssertArgType>(_stat)
442  );
443 
444  FwChanIdType _id;
445 
446  _id = this->getIdBase() + CHANNELID_CYCLETIME;
447 
448  this->m_Tlm_OutputPort[0].invoke(
449  _id,
450  _tlmTime,
451  _tlmBuff
452  );
453  }
454  }
455 
458  U32 arg,
459  Fw::Time _tlmTime
460  )
461  {
462  if (this->m_Tlm_OutputPort[0].isConnected()) {
463  if (
464  this->m_Time_OutputPort[0].isConnected() &&
465  (_tlmTime == Fw::ZERO_TIME)
466  ) {
467  this->m_Time_OutputPort[0].invoke(_tlmTime);
468  }
469 
470  Fw::TlmBuffer _tlmBuff;
471  Fw::SerializeStatus _stat = _tlmBuff.serialize(arg);
472  FW_ASSERT(
473  _stat == Fw::FW_SERIALIZE_OK,
474  static_cast<FwAssertArgType>(_stat)
475  );
476 
477  FwChanIdType _id;
478 
479  _id = this->getIdBase() + CHANNELID_CYCLECOUNT;
480 
481  this->m_Tlm_OutputPort[0].invoke(
482  _id,
483  _tlmTime,
484  _tlmBuff
485  );
486  }
487  }
488 
489  // ----------------------------------------------------------------------
490  // Time
491  // ----------------------------------------------------------------------
492 
494  getTime()
495  {
496  if (this->m_Time_OutputPort[0].isConnected()) {
497  Fw::Time _time;
498  this->m_Time_OutputPort[0].invoke(_time);
499  return _time;
500  }
501  else {
502  return Fw::Time(TB_NONE, 0, 0);
503  }
504  }
505 
506  // ----------------------------------------------------------------------
507  // Calls for messages received on typed input ports
508  // ----------------------------------------------------------------------
509 
510  void PassiveRateGroupComponentBase ::
511  m_p_CycleIn_in(
512  Fw::PassiveComponentBase* callComp,
513  FwIndexType portNum,
514  Os::RawTime& cycleStart
515  )
516  {
517  FW_ASSERT(callComp);
518  PassiveRateGroupComponentBase* compPtr = static_cast<PassiveRateGroupComponentBase*>(callComp);
519  compPtr->CycleIn_handlerBase(
520  portNum,
521  cycleStart
522  );
523  }
524 
525 }
#define FW_ASSERT(...)
Definition: Assert.hpp:14
#define FW_NUM_ARRAY_ELEMENTS(a)
number of elements in an array
Definition: BasicTypes.h:70
#define PRI_PlatformIntType
@ TB_NONE
No time base has been established.
Definition: FpConfig.h:70
I32 FwEnumStoreType
Definition: FpConfig.h:64
PlatformAssertArgType FwAssertArgType
Definition: FpConfig.h:39
U32 FwChanIdType
Definition: FpConfig.h:95
PlatformIndexType FwIndexType
Definition: FpConfig.h:25
void setPortNum(NATIVE_INT_TYPE portNum)
void init()
Object initializer.
Definition: ObjBase.cpp:27
const char * toChar() const
Definition: ObjectName.hpp:50
void addCallPort(InputTimePort *callPort)
Register an input port.
Definition: TimePortAc.cpp:134
void invoke(Fw::Time &time)
Invoke a port interface.
Definition: TimePortAc.cpp:147
void init()
Initialization function.
Definition: TimePortAc.cpp:128
void addCallPort(InputTlmPort *callPort)
Register an input port.
Definition: TlmPortAc.cpp:150
void init()
Initialization function.
Definition: TlmPortAc.cpp:144
void invoke(FwChanIdType id, Fw::Time &timeTag, Fw::TlmBuffer &val)
Invoke a port interface.
Definition: TlmPortAc.cpp:163
bool isConnected()
Definition: PortBase.cpp:41
SerializeStatus serialize(U8 val)
serialize 8-bit unsigned int
void format(const CHAR *formatString,...)
write formatted string to buffer
Definition: StringBase.cpp:56
Definition: Time.hpp:9
void addCallComp(Fw::PassiveComponentBase *callComp, CompFuncPtr funcPtr)
Register a component.
Definition: CyclePortAc.cpp:62
void init()
Initialization function.
Definition: CyclePortAc.cpp:56
void init()
Initialization function.
void addCallPort(InputSchedPort *callPort)
Register an input port.
void invoke(U32 context)
Invoke a port interface.
Auto-generated base for PassiveRateGroup component.
PassiveRateGroupComponentBase(const char *compName="")
Construct PassiveRateGroupComponentBase object.
void tlmWrite_CycleTime(U32 arg, Fw::Time _tlmTime=Fw::Time())
void set_Tlm_OutputPort(FwIndexType portNum, Fw::InputTlmPort *port)
Connect port to Tlm[portNum].
bool isConnected_RateGroupMemberOut_OutputPort(FwIndexType portNum)
void set_Time_OutputPort(FwIndexType portNum, Fw::InputTimePort *port)
Connect port to Time[portNum].
virtual ~PassiveRateGroupComponentBase()
Destroy PassiveRateGroupComponentBase object.
void set_RateGroupMemberOut_OutputPort(FwIndexType portNum, Svc::InputSchedPort *port)
Connect port to RateGroupMemberOut[portNum].
void tlmWrite_CycleCount(U32 arg, Fw::Time _tlmTime=Fw::Time())
void RateGroupMemberOut_out(FwIndexType portNum, U32 context)
Invoke output port RateGroupMemberOut.
virtual void CycleIn_handler(FwIndexType portNum, Os::RawTime &cycleStart)=0
Handler for input port CycleIn.
void tlmWrite_MaxCycleTime(U32 arg, Fw::Time _tlmTime=Fw::Time())
Svc::InputCyclePort * get_CycleIn_InputPort(FwIndexType portNum)
@ CHANNELID_MAXCYCLETIME
Channel ID for MaxCycleTime.
@ CHANNELID_CYCLECOUNT
Channel ID for CycleCount.
void CycleIn_handlerBase(FwIndexType portNum, Os::RawTime &cycleStart)
Handler base-class function for input port CycleIn.
SerializeStatus
forward declaration for string
@ FW_SERIALIZE_OK
Serialization/Deserialization operation was successful.
const Time ZERO_TIME
Definition: Time.cpp:5