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RateGroupDriverComponentAc.cpp
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1 // ======================================================================
2 // \title RateGroupDriverComponentAc.cpp
3 // \author Generated by fpp-to-cpp
4 // \brief cpp file for RateGroupDriver component base class
5 // ======================================================================
6 
8 #include "Fw/Types/Assert.hpp"
10 #if FW_ENABLE_TEXT_LOGGING
11 #include "Fw/Types/String.hpp"
12 #endif
13 
14 namespace Svc {
15 
16  // ----------------------------------------------------------------------
17  // Component initialization
18  // ----------------------------------------------------------------------
19 
21  init(FwEnumStoreType instance)
22  {
23  // Initialize base class
25 
26  // Connect input port CycleIn
27  for (
28  FwIndexType port = 0;
29  port < static_cast<FwIndexType>(this->getNum_CycleIn_InputPorts());
30  port++
31  ) {
32  this->m_CycleIn_InputPort[port].init();
33  this->m_CycleIn_InputPort[port].addCallComp(
34  this,
35  m_p_CycleIn_in
36  );
37  this->m_CycleIn_InputPort[port].setPortNum(port);
38 
39 #if FW_OBJECT_NAMES == 1
40  Fw::ObjectName portName;
41  portName.format(
42  "%s_CycleIn_InputPort[%" PRI_PlatformIntType "]",
43  this->m_objName.toChar(),
44  port
45  );
46  this->m_CycleIn_InputPort[port].setObjName(portName.toChar());
47 #endif
48  }
49 
50  // Connect output port CycleOut
51  for (
52  FwIndexType port = 0;
53  port < static_cast<FwIndexType>(this->getNum_CycleOut_OutputPorts());
54  port++
55  ) {
56  this->m_CycleOut_OutputPort[port].init();
57 
58 #if FW_OBJECT_NAMES == 1
59  Fw::ObjectName portName;
60  portName.format(
61  "%s_CycleOut_OutputPort[%" PRI_PlatformIntType "]",
62  this->m_objName.toChar(),
63  port
64  );
65  this->m_CycleOut_OutputPort[port].setObjName(portName.toChar());
66 #endif
67  }
68  }
69 
70  // ----------------------------------------------------------------------
71  // Getters for typed input ports
72  // ----------------------------------------------------------------------
73 
76  {
77  FW_ASSERT(
78  portNum < this->getNum_CycleIn_InputPorts(),
79  static_cast<FwAssertArgType>(portNum)
80  );
81 
82  return &this->m_CycleIn_InputPort[portNum];
83  }
84 
85  // ----------------------------------------------------------------------
86  // Connect typed input ports to typed output ports
87  // ----------------------------------------------------------------------
88 
91  FwIndexType portNum,
93  )
94  {
95  FW_ASSERT(
96  portNum < this->getNum_CycleOut_OutputPorts(),
97  static_cast<FwAssertArgType>(portNum)
98  );
99 
100  this->m_CycleOut_OutputPort[portNum].addCallPort(port);
101  }
102 
103 #if FW_PORT_SERIALIZATION
104 
105  // ----------------------------------------------------------------------
106  // Connect serial input ports to typed output ports
107  // ----------------------------------------------------------------------
108 
111  FwIndexType portNum,
112  Fw::InputSerializePort* port
113  )
114  {
115  FW_ASSERT(
116  portNum < this->getNum_CycleOut_OutputPorts(),
117  static_cast<FwAssertArgType>(portNum)
118  );
119 
120  this->m_CycleOut_OutputPort[portNum].registerSerialPort(port);
121  }
122 
123 #endif
124 
125  // ----------------------------------------------------------------------
126  // Component construction and destruction
127  // ----------------------------------------------------------------------
128 
130  RateGroupDriverComponentBase(const char* compName) :
131  Fw::PassiveComponentBase(compName)
132  {
133 
134  }
135 
138  {
139 
140  }
141 
142  // ----------------------------------------------------------------------
143  // Getters for numbers of typed input ports
144  // ----------------------------------------------------------------------
145 
148  {
149  return static_cast<FwIndexType>(FW_NUM_ARRAY_ELEMENTS(this->m_CycleIn_InputPort));
150  }
151 
152  // ----------------------------------------------------------------------
153  // Getters for numbers of typed output ports
154  // ----------------------------------------------------------------------
155 
158  {
159  return static_cast<FwIndexType>(FW_NUM_ARRAY_ELEMENTS(this->m_CycleOut_OutputPort));
160  }
161 
162  // ----------------------------------------------------------------------
163  // Connection status queries for typed output ports
164  // ----------------------------------------------------------------------
165 
168  {
169  FW_ASSERT(
170  portNum < this->getNum_CycleOut_OutputPorts(),
171  static_cast<FwAssertArgType>(portNum)
172  );
173 
174  return this->m_CycleOut_OutputPort[portNum].isConnected();
175  }
176 
177  // ----------------------------------------------------------------------
178  // Port handler base-class functions for typed input ports
179  //
180  // Call these functions directly to bypass the corresponding ports
181  // ----------------------------------------------------------------------
182 
185  FwIndexType portNum,
186  Os::RawTime& cycleStart
187  )
188  {
189  // Make sure port number is valid
190  FW_ASSERT(
191  portNum < this->getNum_CycleIn_InputPorts(),
192  static_cast<FwAssertArgType>(portNum)
193  );
194 
195  // Call handler function
196  this->CycleIn_handler(
197  portNum,
198  cycleStart
199  );
200  }
201 
202  // ----------------------------------------------------------------------
203  // Invocation functions for typed output ports
204  // ----------------------------------------------------------------------
205 
208  FwIndexType portNum,
209  Os::RawTime& cycleStart
210  )
211  {
212  FW_ASSERT(
213  portNum < this->getNum_CycleOut_OutputPorts(),
214  static_cast<FwAssertArgType>(portNum)
215  );
216  this->m_CycleOut_OutputPort[portNum].invoke(
217  cycleStart
218  );
219  }
220 
221  // ----------------------------------------------------------------------
222  // Calls for messages received on typed input ports
223  // ----------------------------------------------------------------------
224 
225  void RateGroupDriverComponentBase ::
226  m_p_CycleIn_in(
227  Fw::PassiveComponentBase* callComp,
228  FwIndexType portNum,
229  Os::RawTime& cycleStart
230  )
231  {
232  FW_ASSERT(callComp);
233  RateGroupDriverComponentBase* compPtr = static_cast<RateGroupDriverComponentBase*>(callComp);
234  compPtr->CycleIn_handlerBase(
235  portNum,
236  cycleStart
237  );
238  }
239 
240 }
#define FW_ASSERT(...)
Definition: Assert.hpp:14
#define FW_NUM_ARRAY_ELEMENTS(a)
number of elements in an array
Definition: BasicTypes.h:70
#define PRI_PlatformIntType
I32 FwEnumStoreType
Definition: FpConfig.h:64
PlatformAssertArgType FwAssertArgType
Definition: FpConfig.h:39
PlatformIndexType FwIndexType
Definition: FpConfig.h:25
void setPortNum(NATIVE_INT_TYPE portNum)
void init()
Object initializer.
Definition: ObjBase.cpp:27
const char * toChar() const
Definition: ObjectName.hpp:50
bool isConnected()
Definition: PortBase.cpp:41
void format(const CHAR *formatString,...)
write formatted string to buffer
Definition: StringBase.cpp:56
void addCallComp(Fw::PassiveComponentBase *callComp, CompFuncPtr funcPtr)
Register a component.
Definition: CyclePortAc.cpp:62
void init()
Initialization function.
Definition: CyclePortAc.cpp:56
void init()
Initialization function.
void invoke(Os::RawTime &cycleStart)
Invoke a port interface.
void addCallPort(InputCyclePort *callPort)
Register an input port.
Auto-generated base for RateGroupDriver component.
virtual void CycleIn_handler(FwIndexType portNum, Os::RawTime &cycleStart)=0
Handler for input port CycleIn.
void CycleIn_handlerBase(FwIndexType portNum, Os::RawTime &cycleStart)
Handler base-class function for input port CycleIn.
RateGroupDriverComponentBase(const char *compName="")
Construct RateGroupDriverComponentBase object.
void CycleOut_out(FwIndexType portNum, Os::RawTime &cycleStart)
Invoke output port CycleOut.
virtual ~RateGroupDriverComponentBase()
Destroy RateGroupDriverComponentBase object.
Svc::InputCyclePort * get_CycleIn_InputPort(FwIndexType portNum)
void set_CycleOut_OutputPort(FwIndexType portNum, Svc::InputCyclePort *port)
Connect port to CycleOut[portNum].
bool isConnected_CycleOut_OutputPort(FwIndexType portNum)